Efficient String Matching Using Deterministic Finite Automation Hardware: Speed vs Area Tradeoff

Aakanksha Pandey, Nilay Khare
2012 International Journal of Computer Applications  
Pattern matching is a crucial task in several critical network services such as intrusion detection and matching of the IP address during packet forwarding by the router. In this paper we present an speed vs area tradeoff of the the original DFA and the DFA called delayed input DFA(D 2 FA) with optimized area by eliminating the redundant transition edges.In delayed input DFA the area required to store transition table reduces to 60% of the original DFA but the clock pulse required to execute
more » ... process increases almost 40% of the original DFA. The comparison of area and speed is presented. This area optimized architecture of DFA is simulated and synthesized using VHDL on the Xilinx ISE 12.4.
doi:10.5120/6366-8750 fatcat:7p3dj6rusjbatmsoewwksetw5m