Design of FPGAs with area I/O for field programmable MCM

Vijayshri Maheshwari, Joel Darnauer, John Ramirez, Wayne Wei-Ming Dai
1995 Proceedings of the 1995 ACM third international symposium on Field-programmable gate arrays - FPGA '95  
Area-IO provide a way to eliminate the IO bottleneck of eld programmable logic devices (FPLDs) created the mismatch between the ability of perimeter bonds to provide IO and and the propensity of logic to demand it. Whether the incorporation of area IO into FPLD architectures has undesirable side eects is a question that has not yet been answered. In this paper, we examine the architectural impact of area-IO on FPLDs from a theoretical and experimental standpoint and show that the introduction
more » ... the introduction of area IO generally improves the routability and delay of a set of benchmark circuits.
doi:10.1145/201310.201313 dblp:conf/fpga/MaheshwariDRD95 fatcat:sf5sw6pl5jfxtlom7xuv6doaxq