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Binary Reachability of Timed-register Pushdown Automata and Branching Vector Addition Systems
2019
ACM Transactions on Computational Logic
Timed-register pushdown automata constitute a very expressive class of automata, whose transitions may involve state, input, and top-of-stack timed-registers with unbounded differences. They strictly subsume pushdown timed automata of Bouajjani et al., dense-timed pushdown automata of Abdulla et al., and orbit-finite timed register pushdown automata of Clemente and Lasota. We give an effective logical characterisation of the reachability relation of timed-register pushdown automata. As a
doi:10.1145/3326161
fatcat:ykcup55zvbegxdgpkvkzmolk4u