Binary Reachability of Timed-register Pushdown Automata and Branching Vector Addition Systems

Lorenzo Clemente, Sławomir Lasota, Ranko Lazić, Filip Mazowiecki
2019 ACM Transactions on Computational Logic  
Timed-register pushdown automata constitute a very expressive class of automata, whose transitions may involve state, input, and top-of-stack timed-registers with unbounded differences. They strictly subsume pushdown timed automata of Bouajjani et al., dense-timed pushdown automata of Abdulla et al., and orbit-finite timed register pushdown automata of Clemente and Lasota. We give an effective logical characterisation of the reachability relation of timed-register pushdown automata. As a
more » ... ry, we obtain a doubly exponential time procedure for the non-emptiness problem. We show that the complexity reduces to singly exponential under the assumption of monotonic time. The proofs involve a novel model of one-dimensional integer branching vector addition systems with states. As a result interesting on its own, we show that reachability sets of the latter model are semilinear and computable in exponential time. 1 The model of RTA differs significantly from the other models since the stack contains clock values which are constant with respect to the elapsing of time. 2 Note that Clemente and Lasota denoted by trPDA an undecidable class in which many stack symbols can be popped and pushed in one step, like in prefix-rewriting. For simplicity, we use the same name for the new largest decidable subclass.
doi:10.1145/3326161 fatcat:ykcup55zvbegxdgpkvkzmolk4u