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An Improved Frame Level Redundancy Scrubbing Algorithm for SRAM based FPGA
2017
International Journal of Computer Applications
The use of Static Random Access Memory (SRAM) based Field Programmable Gate Array (FPGA) in critical applications has been considered a solution in space and avionics domain due to its flexibility in achieving multiple requirements such as re-programmability and good performance. However, SRAM-based FPGAs are susceptible to radiation induced Single Event Upset (SEU) that affects the functionality of the implemented design. Therefore, an improved Frame Level Redundancy (FLR) algorithm that uses
doi:10.5120/ijca2017914844
fatcat:mqllhij3zrfzzkezjdeid4cafu