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Proceedings of the 27th annual international symposium on Microarchitecture - MICRO 27
Branch instructions are recognized as a major impediment to exploiting instruction level parallelism. Even with sophisticated branch prediction techniques, many frequently executed branches remain di cult to predict. An architecture supporting predicated execution may allow the compiler to remove many of these hard-to-predict branches, reducing the number of branch mispredictions and thereby improving performance. We present an in-depth analysis of the characteristics of those branches whichdoi:10.1145/192724.192755 fatcat:xrjhapgubfeo7cxusbezblrxti