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Module-per-Object: a Human-Driven Methodology for C++-based High-Level Synthesis Design
[article]
2019
arXiv
pre-print
High-Level Synthesis (HLS) brings FPGAs to audiences previously unfamiliar to hardware design. However, achieving the highest Quality-of-Results (QoR) with HLS is still unattainable for most programmers. This requires detailed knowledge of FPGA architecture and hardware design in order to produce FPGA-friendly codes. Moreover, these codes are normally in conflict with best coding practices, which favor code reuse, modularity, and conciseness. To overcome these limitations, we propose
arXiv:1903.06693v2
fatcat:wxgapryxbfcwjgum6jaterfcqy