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Lecture Notes in Computer Science
We present a new method that combines the efficiency of testing with the reasoning power of satisfiability modulo theory (SMT) solvers for the verification of multithreaded programs under a user specified test vector. Our method performs dynamic executions to obtain both under-and over-approximations of the program, represented as quantifier-free first order logic formulas. The formulas are then analyzed by an SMT solver which implicitly considers all possible thread interleavings. The symbolicdoi:10.1007/978-3-642-16901-4_27 fatcat:w5yz7nvhezeqnhhd4rr7yojzt4