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ERROR COMPENSATION TECHNIQUE FOR 90NM CMOS FIXED-WIDTH AND AREA EFFICIENT BOOTH ENCODING MULTIPLIER
ICTACT Journal on Microelectronics
An area efficient, fixed width multiplier using booth encoding is done in this work. The work is further extended to accommodate the error correction feature. As in many signal processing products fast and efficient processing elements are required, the demand increases day by day. This work is one such finding to meet the standard of today's contemporary technology. The proposed methodology suits well for the discrete cosine transform application. A new multiplier architecture using boothdoi:10.21917/ijme.2019.0141 doaj:8073a1f8a1944165a1ce94944eba7354 fatcat:3mrpvvzmrvhx5dsx5sxlgts3u4