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Exploring the tradeoffs between programmability and efficiency in data-parallel accelerators
Proceeding of the 38th annual international symposium on Computer architecture - ISCA '11
We present a taxonomy and modular implementation approach for data-parallel accelerators, including the MIMD, vector-SIMD, subword-SIMD, SIMT, and vector-thread (VT) architectural design patterns. We introduce Maven, a new VT microarchitecture based on the traditional vector-SIMD microarchitecture, that is considerably simpler to implement and easier to program than previous VT designs. Using an extensive design-space exploration of full VLSI implementations of many accelerator design points,doi:10.1145/2000064.2000080 dblp:conf/isca/LeeABXLBA11 fatcat:wwaa7pxzhffkdpkxtglil3lu3y