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VLSI architecture of leading eigenvector generation for on-chip principal component analysis spike sorting system
2008
2008 30th Annual International Conference of the IEEE Engineering in Medicine and Biology Society
On-chip spike detection and principal component analysis (PCA) sorting hardware in an integrated multi-channel neural recording system is highly desired to ease the bandwidth bottleneck from high-density microelectrode array implanted in the cortex. In this paper, we propose the first leading eigenvector generator, the key hardware module of PCA, to enable the whole framework. Based on the iterative eigenvector distilling algorithm, the proposed flipped structure enables the low cost and low
doi:10.1109/iembs.2008.4649882
pmid:19163385
fatcat:lo2if3eiqzhgflbfinq2v5a6ri