An emerging problem facing future high performance multi-core processors is transient faults caused by radiation, noise and other factors. These faults will likely make future multi-core processors less reliable as chip features shrink and the number of cores increase. To address this problem, we propose a new and practical systems approach of managing and allocating reliability according to software process requirements. The asymmetric multi-core architecture is based on cores with differing

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... liabilities. Critical and non-critical software components are identified and matched with the higher reliability cores. We show that by using asymmetrically reliable cores the overall system failure rate can be reduced by several times when critical processes can be isolated and executed by higher reliability cores, while offering the same or better overall performance, power utilization and chip area as symmetric cores. International Conference on Complex, Intelligent and Software Intensive Systems 978-0-7695-3575-3/09 $25.00