Simultaneous peak and average power minimization during datapath scheduling

S.P. Mohanty, N. Ranganathan
2005 IEEE Transactions on Circuits and Systems I Fundamental Theory and Applications  
In low power design for deep submicron and nanometer regimes, the peak power, power fluctuation, average power and total energy are equally design constraints. In this work, we propose datapath scheduling algorithms for simultaneous minimization of peak and average power. The minimization schemes based on integer linear programming (ILP) are developed for the design of datapaths that can function in three modes of operation: (1) single supply voltage and single frequency (SVSF), (2) multiple
more » ... ply voltages and dynamic frequency clocking (MVDFC) and (3) multiple supply voltages and multicycling (MVMC). The techniques are evaluated by estimating the peak power consumption, the average power consumption and the power delay product of selected high level synthesis benchmark circuits for different resource constraints. Experimental results indicate that combining multiple supply voltages and dynamic frequency clocking, yields significant reductions in the peak power, the average power, and the power delay product.
doi:10.1109/tcsi.2005.849131 fatcat:qho5yhg22jemzcr652kg5osq2a