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Microarchitecture-aware Fault Models: Experimental Evidence and Cross-Layer Inference Methodology
2021
2021 16th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS)
Fault injection attacks are considered one of the major threats to cyber-physical systems. The increasing complexity of embedded microprocessors involves complicated behaviours in presence of such attacks. Realistic fault models are required to study code vulnerabilities and be able to protect digital systems from these attacks. However, inferring fault models using only limited observations of faulty microprocessors is difficult. In this article, we present experiments that show the difficulty
doi:10.1109/dtis53253.2021.9505074
fatcat:uofjma5p4ffydaznwbjwqo73hq