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Design and experimental verification of a CMOS adiabatic logic with single-phase power-clock supply
Proceedings of 40th Midwest Symposium on Circuits and Systems. Dedicated to the Memory of Professor Mac Van Valkenburg
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A new adiabatic CMOS logic that operates from a single-phase power-clock is presented. A simple and efficient power-clock generator is integrated with the logic to generate the required AC power-clock supply waveform. Circuit performance is evaluated using a chain of inverters realized in 1.2µm technology. Experimental results show energy savings comparable to other adiabatic logic families that require multiphase power-clocks.
doi:10.1109/mwscas.1997.666123
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