Automated techniques for energy efficient scheduling on homogeneous and heterogeneous chip multi-processor architectures

Sushu Zhang, Karam S. Chatha
<span title="">2008</span> <i title="IEEE"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/fkjmyf3l45eo5ovjdnpeqpdjd4" style="color: black;">2008 Asia and South Pacific Design Automation Conference</a> </i> &nbsp;
We address performance maximization of independent task sets under energy constraint on chip multi-processor (CMP) architectures that support multiple voltage/frequency operating states for each core. We prove that the problem is strongly NP-hard. We propose polynomial time 2-approximation algorithms for homogeneous and heterogeneous CMPs. To the best of our knowledge, our techniques offer the tightest bounds for energy constrained design on CMP architectures. Experimental results demonstrate
more &raquo; ... at our techniques are effective and efficient under various workloads on several CMP architectures. 1B-5 1B-5
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/aspdac.2008.4484026">doi:10.1109/aspdac.2008.4484026</a> <a target="_blank" rel="external noopener" href="https://dblp.org/rec/conf/aspdac/ZhangC08.html">dblp:conf/aspdac/ZhangC08</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/v56s37yqkzfs3gxccjgjcwy2g4">fatcat:v56s37yqkzfs3gxccjgjcwy2g4</a> </span>
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