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This paper presents a performance-driven I/O pin routing algorithm with special consideration of wire uniformity. First, a topological routing based on min-cost max-flow algorithm is proposed. In this phase, an exponential weight function is used to guide the flow distribution which is very helpful in distributing wires, globally and uniformly, on the whole routing area. Then a physical routing phase is applied to implement one-to-one connection between chip pads and I/O pins, which focuses ondoi:10.1109/aspdac.1999.759779 dblp:conf/aspdac/WangZCS99 fatcat:bk5kivsc3rgghlb2lrw42e3orm