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This paper introduces ADAM, an approach for merging multiple FPGA designs into a single hardware design, so that multiple placeand-route tasks can be replaced by a single task to speed up functional evaluation of designs, especially during the development process. ADAM has three key elements. First, a novel approximate maximum common subgraph detection algorithm with linear time complexity to maximize sharing of resources in the merged design. Second, a prototype tool implementing this common
doi:10.1145/3174243.3174247
dblp:conf/fpga/NgLL18
fatcat:xugrgidax5hm7eounibvahlbja