A visual approach to validating system level designs

Jochen Klose, Thomas Kropf, Jürgen Ruf
2002 Proceedings of the 15th international symposium on System Synthesis - ISSS '02  
This paper proposes a simulation-based methodology for validation of a system under design in an early phase of development. The key element of this approach is the visual specification, as Live Sequence Charts (LSCs), of the properties to be checked. The LSCs are automatically translated into the input format for the SystemC-based checker engine, which indicates during simulation, if the property is fulfilled or produces a counter-example, if the property is violated. The entire process from
more » ... e visual property specification to the checking is largely automated, which makes our approach accessible even for users which have not been trained in formal methods.
doi:10.1145/581199.581240 fatcat:jikwk6yudrb3nc6ij5c6yj4kby