A computational model for SAT-based verification of hardware-dependent low-level embedded system software

B. Schmidt, C. Villarraga, J. Bormann, D. Stoffel, M. Wedler, W. Kunz
2013 2013 18th Asia and South Pacific Design Automation Conference (ASP-DAC)  
HW/SW Model  Flow  Advantages of Model  Experiment  Conclusion / Future Work 2 Content  Embedded System  Close interaction between HW and SW  Examples: drivers, communication structures  Goal  Formal verification (FV) of combined HW/SW behavior  Objective of this work  Computational model and algorithms for FV of hardware-dependent, low-level software Motivation
doi:10.1109/aspdac.2013.6509684 dblp:conf/aspdac/SchmidtVBSWK13 fatcat:ch62gwfgbnasdfyctkkgedit24