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<a target="_blank" rel="noopener" href="https://fatcat.wiki/container/afve5b3tavbfzch46mdtazbqla" style="color: black;">Software, Practice & Experience</a>
There is growing interest in network processor technologies capable of processing packets at line rates. Network processors are likely to be an integral part of next generation high-speed router and switch architectures, replacing the Application Specific Integrated Circuits (ASICs) that are used in routers today. In this paper, we present the design, implementation and evaluation of NetBind, a high performance, flexible and scalable binding tool for dynamically constructing data paths in<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1002/spe.662">doi:10.1002/spe.662</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/x33vxhkx5vh43e7gjzqjkiqshy">fatcat:x33vxhkx5vh43e7gjzqjkiqshy</a> </span>
more »... k processor-based routers. The methodology that underpins NetBind balances the flexibility of network programmability against the need to process and forward packets at line speeds. To support dynamic binding of components with minimum addition of instructions in the critical path, NetBind modifies the machine language code of components at run time. To support fast data path composition, NetBind reduces the number of binding operations required for constructing data paths to a minimum set so that binding latencies are comparable to packet forwarding times. Data paths constructed using NetBind seamlessly share the resources of the same network processor. Resources are assigned during the binding process. We compare the performance of NetBind to the MicroACE system developed by Intel and show that NetBind provides better performance in comparison to MicroACE with smaller binding overhead. The NetBind source code described and evaluated in this paper is freely available on the Web  for experimentation.
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