Technology advances tend to reduce minimum dimensions and source voltages to maintain scaling rules. Both scaling trends make noise more critical, reduce yield and increase device parameter fluctuations. This paper presents an statistical model that permits the study of noise and parameter deviations on gates. Using this model stochastic resonance (SR) is studied both in single devices and arrays for subthreshold and suprathreshold input signals. The SR is measured by the signal-to-noise ratio

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... SNR) in the time domain and a modified SNR is proposed to take into account all the effects induced by noise in gates. With this measure subthreshold and suprathreshold SR is reviewed. Finally, a discussion of the possibility of considering noise a part of the electronic circuits is presented, suggesting that it could be a solution to some of the emerging problems in future nanotechnologies. Downloaded From: http://spiedigitallibrary.org/ on 10/22/2012 Terms of Use: http://spiedl.org/terms Proc. of SPIE Vol. 5649 61 Downloaded From: http://spiedigitallibrary.org/ on 10/22/2012 Terms of Use: http://spiedl.org/terms