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Automated Design Space Exploration for DSP Applications
2008
Journal of Signal Processing Systems
We present a performance analysis framework that efficiently generates and analyzes hardware architectures for computationally intensive signal processing applications. Our framework synthesizes designs from a high level of abstraction into well-constructed and recognizable hardware structures that perform well in terms of area, throughput and power dissipation. Cost functions provided by our framework allow the user to reduce the design space to a set of efficient hardware architectures that
doi:10.1007/s11265-008-0226-2
fatcat:angbfbzirjf5fha24fcolofgzq