A copy of this work was available on the public web and has been preserved in the Wayback Machine. The capture dates from 2018; you can also visit the original URL.
The file type is application/pdf
.
Compiling for energy efficiency on timing speculative processors
2012
Proceedings of the 49th Annual Design Automation Conference on - DAC '12
Timing speculation is a promising technique for improving microprocessor yield, in field reliability, and energy efficiency. Previous evaluations of the energy efficiency benefits of timing speculation have either been based on code compiled for a traditional target [2] -a processor that produces no errors, or code that relies on additional hardware support [6] . In this paper, we advocate that binaries for timing speculative processors should be optimized differently than those for
doi:10.1145/2228360.2228602
dblp:conf/dac/SartoriK12
fatcat:anfejuhrcrfl7agwqpiykggskm