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The goal of this article is to compare some optimised implementations on current high performance platforms in order to highlight architectural trends in the field of embedded architectures and to get an estimation of what should be the components of a next generation vision system. We present some implementations of robust motion detection algorithms on three architectures: a general purpose RISC processor-the PowerPC G4-a parallel artificial retina dedicated to low level imagedoi:10.1007/s11554-008-0096-7 fatcat:xzdxst3wrjfz3nglhk4tmbfzxe