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Multifrequency TAM design for hierarchical SOCs
2006
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
The emergence of megacores in hierarchical systemon-a-chip (SOC) presents new challenges to electronic test automation. This paper describes a new framework for designing test access mechanisms (TAMs) for modular testing of hierarchical SOCs. We first explore the concept that TAMs on the same level of design hierarchy employ multiple frequencies for test data transportation. Then we extend this concept to hierarchical SOCs and, by introducing frequency converters at the inputs and outputs of
doi:10.1109/tcad.2005.852440
fatcat:iqpwpyourbdabcp2vfnbv5klkm