A copy of this work was available on the public web and has been preserved in the Wayback Machine. The capture dates from 2020; you can also visit <a rel="external noopener" href="https://arxiv.org/pdf/1508.01008v1.pdf">the original URL</a>. The file type is <code>application/pdf</code>.
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Deep neural networks have been demonstrated impressive results in various cognitive tasks such as object detection and image classification. In order to execute large networks, Von Neumann computers store the large number of weight parameters in external memories, and processing elements are timed-shared, which leads to power-hungry I/O operations and processing bottlenecks. This paper describes a neuromorphic computing system that is designed from the ground up for the energy-efficient<span class="external-identifiers"> <a target="_blank" rel="external noopener" href="https://arxiv.org/abs/1508.01008v1">arXiv:1508.01008v1</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/noi45s26vfbdnoqpn42cgxjqba">fatcat:noi45s26vfbdnoqpn42cgxjqba</a> </span>
more »... on of large-scale neural networks. The computing system consists of a non-conventional compiler, a neuromorphic architecture, and a space-efficient microarchitecture that leverages existing integrated circuit design methodologies. The compiler factorizes a trained, feedforward network into a sparsely connected network, compresses the weights linearly, and generates a time delay neural network reducing the number of connections. The connections and units in the simplified network are mapped to silicon synapses and neurons. We demonstrate an implementation of the neuromorphic computing system based on a field-programmable gate array that performs the MNIST hand-written digit classification with 97.64% accuracy.
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