Application of symbolic computer algebra to arithmetic circuit verification

Yuki Watanabe, Naofumi Homma, Takafumi Aoki, Tatsuo Higuchi
2007 2007 25th International Conference on Computer Design  
This paper presents a formal approach to verify arithmetic circuits using symbolic computer algebra. Our method describes arithmetic circuits directly with high-level mathematical objects based on weighted number systems and arithmetic formulae. Such circuit description can be effectively verified by polynomial reduction techniques using Gröbner Bases. In this paper, we describe how the symbolic computer algebra can be used to describe and verify arithmetic circuits. The advantageous effects of
more » ... ntageous effects of the proposed approach are demonstrated through experimental verification of some arithmetic circuits such as multiply-accumulator and FIR filter. The result shows that the proposed approach has a definite possibility of verifying practical arithmetic circuits where the conventional techniques failed.
doi:10.1109/iccd.2007.4601876 dblp:conf/iccd/WatanabeHAH07 fatcat:vuxenflrsfgtjjiaq46jlhfmmy