Guest Editorial: IEEE TC Special Issue On Smart Edge Computing and IoT
IEEE transactions on computers
Ç T HE evolution of the Internet of Things (IoT) is changing the nature of edge-computing devices. Availability of novel sensor interfaces, efficient digital low power processors, and high-bandwidth low-power communication protocols have generated a perfect storm within the IoT ecosystem. Next generation IoT end-nodes have to support, in place, an increasing range of functionality: multi-sensory data processing and analysis, complex systems control strategies, and, ultimately, artificial
... gence. These new capabilities will enable disruptive innovation in wearable and implantable biomedical devices, autonomous insect-sized drones, miniaturized devices for environmental sensing and continuous monitoring of buildings, industrial machinery, power grids. As a result, we witness a paradigm shift towards computationally demanding tasks on tiny form-factor devices at extreme energy efficiency. Furthermore, the AI revolution, which gains traction from the pervasive use of Deep learning, is posing new intriguing challenges, and it requires the exploration of novel HW-SW codesign methodologies and advanced optimization techniques for the AI frameworks on resource-limited processors. Deep learning inference requires a massive amount of MAC operations and high-bandwidth data transfers, which are critical in digital architectures, especially in those that are used in edge devices. For this reason, both architectural optimizations and neural network performance tuning and analysis tools are important tools for the evolution of next generation edge devices. This Special Issue of IEEE TRANSACTIONS ON COMPUTERS presents novel contributions on IoT smart edge-computing architectures, systems, and related hardware-software design approaches. Following a call for papers, we received 27 submissions from authors in more than 15 countries on vastly diverse topics. We were supported by more than 50 reviewers who helped the authors to improve their contributions. After a preliminary screening, each submitted manuscript has been assigned to at least three reviewers. Eventually, 12 manuscripts have been selected to form this Special Issue of IEEE TRANSACTIONS ON COMPUTERS. Thus, this Special Issue collects high-level contributions both from academia and industry, spanning several fields such as parallel computing, hardware/software codesign, DNN optimization and deployment, as well as computer architectures and novel pattern recognition hardware friendly frameworks. Below, we provide a brief summary of the key contribution of the papers included in the Special Issue. The paper titled "Task Mapping and Scheduling for OpenVX Applications on Heterogeneous Multi-/Many-Core Architectures" by Lumpp et al., improves the system performance of the OpenVX platform by taking holistic scheduling and mapping of resources. It implemented a heterogeneous earliest finish time (HEFT) heuristic, and it is applied to the static scheduling of OpenVX applications achieving up to 70% performance improvement. In addition, the exclusive earliest finish time (XEFT) algorithm is also presented to introduce the notion of exclusive overlap between single implementation primitives to improve the load balancing achieving 33% performance improvement over HEFT. "ZigZag: Enlarging Joint Architecture-Mapping Design Space Exploration for DNN Accelerators" by Mei et al. proposes a memory-centric DNN codesign framework for extending the design space exploration with uneven mapping and smart searching strategies. Benchmark experiments show up to 33% improvement of energy efficiency compared with the state-of-the-art frameworks. The next paper, entitled "Real-Time Detection of Hogweed: UAV Platform Empowered by Deep Learning" by Menshchikov et al., presents a case study on optimizing deep learning for running on a single board computer for hogweed detection from unmanned aerial vehicles. The proposed system, including the fully convolutional neural networks optimizes the detection quality and frame rate, achieving 0.96 ROC AUC in the hogweed segmentation task using 0.46 frame per second 4K resolution frames on the NVIDIA Jetson Nano platform. The paper "Minimal Complexity Machines Under Weight Quantization" by Sharma et al. analyzes the effect of parameter quantization on the performance, a number of support vectors, model size, L2 norm, and run time on various Least Squares (LS) kernel algorithms. It shows that EFS based algorithms result in higher accuracy, lower L2 norm, and least number of support vectors compared to LS-SVM variants. It also shows that EFS-based algorithms can attain a performance level similar to or even higher than full precision (32 bits), with as small as 3 integer and 5 fraction bits. This has significant implications for implementation in the Internet of Things (IoT) devices, which benefit from model sparsity and good generalization.