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Effective communication for a system of cluster-on-a-chip processors
2015
Proceedings of the Sixth International Workshop on Programming Models and Applications for Multicores and Manycores - PMAM '15
In this work, we analyze efficient communication methods for a grid of many-core processors in the absence of cache coherence. For this study, we build a multi-chip processor with 240 tightly connected cores and demonstrate its scalability. This processor is based on the Intel SCC, a clusteron-a-chip research processor with 48 non-coherent memory coupled cores. Our new research system virtually extends the on-chip network of multiple SCC systems and provides new communication functionality for
doi:10.1145/2712386.2712393
dblp:conf/ppopp/RebleLFM15
fatcat:kj4vj5j6gnfh3jyskvdhmrbiku