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A 19.2GOPS, 20mW adaptive FIR filter

M. Figueroa, S. Bridges, D. Hsu, C. Diorio
ESSCIRC 2004 - 29th European Solid-State Circuits Conference (IEEE Cat. No.03EX705)  

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We implemented a 48-tap, mixed-signal adaptive FIR filter with 8-bit input and 10-bit output resolution. The filter stores its tap weights in nonvolatile analog memory cells and adapts using the Least-Mean-Square (LMS) algorithm. We run the input through a digital tapped delay line, multiply the digital words with the analog tap weights using mixed-signal multipliers, and adapt the tap coefficients using pulse-based feedback. The accuracy of the weight updates exceeds 13 bits. The total die
more » ... is 2.6mm 2 in a 0.35µm CMOS process. The filter delivers a performance of 19.2GOPS at 200MHz, and consumes 20mW providing a 6mA differential output current.
doi:10.1109/esscirc.2003.1257184 fatcat:kghz5yv3nzflfjfs5x2r2lguha
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M. Figueroa, S. Bridges, D. Hsu, C. Diorio. "A 19.2GOPS, 20mW adaptive FIR filter." ESSCIRC 2004 - 29th European Solid-State Circuits Conference (IEEE Cat. No.03EX705)