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Is TSV-based 3D Integration Suitable for Inter-die Memory Repair?
Design, Automation & Test in Europe Conference & Exhibition (DATE), 2013
In this paper we address lower level issues related to 3D inter-die memory repair in an attempt to evaluate the actual potential of this approach for current and foreseeable technology developments. We propose several implementation schemes both for inter-die row and column repair and evaluate their impact in terms of area and delay. Our analysis suggests that current stateof-the-art TSV dimensions allow inter-die column repair schemes at the expense of reasonable area overhead. For row repair,doi:10.7873/date.2013.259 dblp:conf/date/LefterVTEHC13 fatcat:vrjdfrtv3nhgfpfmlawerh7rzm