Design and implementation of a fault emulator for LVRT capability testing of wind turbines

G. Karthick, C. Gokul, A. Vijayakumari, P. Sujith, A. Suyampulingam, N. Praveen Kumar
2016 3rd International Conference on Electrical, Electronics, Engineering Trends, Communication, Optimization and Sciences (EEECOS 2016)   unpublished
Recently, Low Voltage Ride-through (LVRT) capability is mandated for all wind turbine systems to avoid them getting disconnected during power line voltage sags. This paper presents the design and implementation of a shunt and series combinational resistance based voltage sag generator which can serve as a fault emulator to test the fault ride-through capability of grid connected wind turbines. A shunt type sag generator for testing of 1kVA generators is developed to introduce sag of 10% to 90%
more » ... sag of 10% to 90% of the nominal line voltage. The series and shunt resistances required to achieve the sag are designed and verified through simulation studies. A prototype is developed with micro-controller controlled static switches to select appropriate resistance pair for a particular sag requirement. The control circuit takes the sag depth and sag duration as input from the user and creates the sag on the power line accordingly. Performance evaluation of the developed sag generator is carried out on a grid connected 1kVA generator. The design, simulation and hardware results of the developed sag emulator are presented and validated.
doi:10.1049/cp.2016.1539 fatcat:ceis7atbbjfc5mfmmjmmowckgu