A more practical PRAM model

P. B. Gibbons
1989 Proceedings of the first annual ACM symposium on Parallel algorithms and architectures - SPAA '89  
This paper introduces the Asynchronous PRAM model of computation, a variant of the PRAM in which the processors run asy ~chronously and there is an explicit charge for synchronization. A fanfily of Asynchrooous PRAM's are defined, varying in the types of synchronization steps permitted and the costs for accessing the shared memory. Algorithms, lower bounds, and simulation results are presented for an interesting member of the family. Introduction The PRAM model of computation consists of a
more » ... ction ofp sequential processors, each with its own private local memory, communicating with one another through a shared global memory. The processors execute in lockstep, although each processor does have its own local program. A PRAM computation is a sequence of time steps, alternating between three types of instructions: read, compute, and write. In a read step, each processor can read one global memory location into a local memory location. In a compute step, each processor can execute a single RAM operation whose operands are in local memory, storing the result in a local memory location. In a write step, each processor can write the contents of one local memory location into a global memory location. All three steps are assumed to take unit time in the model. Although an idealized model, the PRAM has proven to be a useful model for studying parallel computation (see [KRS8] for a survey of results). The model is simple and relatively easy to use: its shared memory abstraction hides the details of the interprocessor communication and synchronization.
doi:10.1145/72935.72953 dblp:conf/spaa/Gibbons89 fatcat:mqwwiodoxvemtpenn4dhvstzdi