InvisiMem

Shaizeen Aga, Satish Narayanasamy
2017 SIGARCH Computer Architecture News  
A practically feasible low-overhead hardware design that provides strong defenses against memory bus side channel remains elusive. This paper observes that smart memory, memory with compute capability and a packetized interface, can dramatically simplify this problem. InvisiMem expands the trust base to include the logic layer in the smart memory to implement cryptographic primitives, which aid in addressing several memory bus side channel vulnerabilities efficiently. This allows the secure
more » ... processor to send encrypted addresses over the untrusted memory bus, and thereby eliminates the need for expensive address obfuscation techniques based on Oblivious RAM (ORAM). In addition, smart memory enables efficient solutions for ensuring freshness without using expensive Merkle trees, and mitigates memory bus timing channel using constant heart-beat packets. We demonstrate that InvisiMem designs have one to two orders of magnitude of lower overheads for performance, space, energy, and memory bandwidth, compared to prior solutions. CCS CONCEPTS • Security and privacy → Hardware-based security protocols; • Hardware → 3D integrated circuits;
doi:10.1145/3140659.3080232 fatcat:56pwkqil3be73hcfgrhgvttzii