Test data compression and compaction for embedded test of nanometer technology designs

J. Rajski, J. Tyszer
Proceedings 21st International Conference on Computer Design  
In its first part, this paper examines various forms of embedded deterministic test with particular emphasis on input stimuli compression and test response compaction schemes. Subsequently, the Embedded Deterministic Test (EDT) scheme, which significantly reduces manufacturing test cost by providing a dramatic reduction in scan test data volume and scan test time, is discussed.
doi:10.1109/iccd.2003.1240915 dblp:conf/iccd/RajskiT03 fatcat:gtmofn5rs5bltlap3ojs5vwuhy