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Applying asynchronous techniques to a Viterbi Decoder design
2001
IEE Seminar Low Power IC Design
unpublished
Q2001Thelnstitution of EledriCal Engineers. of arithmetic used in the PMU. Serial unary arithmetic has been adopted within the PMU. Here, all weights are held as a series of events in data-less FIFOs, with the data implicitly indicated by the state of the FIFO control elements. Two phase arithmetic is used so that the levels convey no meaning. However, an edge (or change of state from one control element to the next) indicates an event which is interpreted as a count of one. The basic unit of
doi:10.1049/ic:20010008
fatcat:4dzzxdtiwzfvpgcjtmr3axc5ae