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Simulation on Planarization Process of Patterned Si Wafer : Improvements in accuracy of simulation model(M^4 processes and micro-manufacturing for science)
2005
Proceedings of International Conference on Leading Edge Manufacturing in 21st century LEM21
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Many models have been proposed for simulation ofplanarization process ofpatterned Si wafer. In the previous report, an analytical model has been established to incorporate variations in pattem density, step height of an oxide layout, the tool stiffiiess and infeed scheme, in this papeg we aimed to further improving the accuracy of the simulation via introducing an actual oxide layout. Instead ofa rectangular layout, a triangular layout with multi-step height was used for the simulation model to
doi:10.1299/jsmelem.2005.2.883
fatcat:yjykz4mug5hblepnqebl6jay5a