The preliminary evaluation of MBP-light with two protocol policies for a massively parallel processor-JUMP-1

I. Hiroaki, K. Anjo, J. Yamamoto, J. Tanabe, M. Wakabayashi, M. Sato, H. Amano, K. Hiraki
1999 Proceedings. Frontiers '99. Seventh Symposium on the Frontiers of Massively Parallel Computation  
A massively parallel processor called JUMP-1 has been developed to build an efficient cache coherent-distributed shared memory (DSM) on a large system with more than 1000 processors. Here, the dedicated processor called MBP (Memory Based Processor) -light to manage the DSM of JUMP-1 is introduced, and its preliminary performance with two protocol policies -update/invalidate-is evaluated. From results of its simulation, it appears that simple operations like the tag check and the
more » ... ation of acknowledgment packets are mostly processed by the hardware mechanisms in MBP-light without aids of the core processor with both policies. Also, the buffer-register architecture adopted by the core processor in MBP-light is exploited enough to process a protocol transaction for both policies.
doi:10.1109/fmpc.1999.750609 fatcat:j4g5uwo5fnezxmuwoeewqz3tku