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Supporting Microthread Scheduling and Synchronisation in CMPs
2006
International journal of parallel programming
Chip multiprocessors hold great promise for achieving scalability in future systems. Microthreaded chip multiprocessors add a means of exploiting legacy code in such systems. Using this model, compilers generate parametric concurrency from sequential source code, which can be used to optimise a range of operational parameters such as power and performance over many orders of magnitude, given a scalable implementation. This paper shows scalability in performance, power and most importantly, in
doi:10.1007/s10766-006-0017-y
fatcat:w7l3s4r6mnevpjzpuv5lhmebfm