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High-end processors typically incorporate complex branch predictors consisting of many large structures that together consume a notable fraction of total chip power (more than 10% in some cases). Depending on the applications, some of these resources may remain underused for long periods of time. We propose a methodology to reduce the energy consumption of the branch predictor by characterizing prediction demand using profiling and dynamically adjusting predictor resources accordingly.doi:10.1145/871506.871603 dblp:conf/islped/ChaverPPTH03 fatcat:todlb2lqzraxdgpjndnl7pd5ae