Complexity Analysis of H.264 Decoder for FPGA Design

Tuomas Lindroth, Nastooh Avessta, Jukka Teuhola, Tiberiu Seceleanu
2006 2006 IEEE International Conference on Multimedia and Expo  
A major challenge in the design of any real time system is the proper selection of implementation and platform alternatives. In this paper, a suitable FPGA-based design of the H.264 decoder is presented. Since H.264 standard only specifies the syntax and semantics of the video stream and not the video codec itself, the selection process may be directed based upon the temporal complexity of different parts of the decoder. Here, we present the process flow of these parts using basic algebraic
more » ... ators. The analysis of the required logic elements to implement the decoder, on various platforms, is presented. H.264 decoder; decoding block; baseline profile I.
doi:10.1109/icme.2006.262765 dblp:conf/icmcs/LindrothATS06 fatcat:j6ejdjuaq5cc3ce5opm6u5pgzq