In this paper, we propose Petri net models for processing elements. The processing elements include: a general-purpose processor (GPP), a reconfigurable element (RE), and a hybrid element (co mbining a GPP with an RE). The models consist of many transitions and places. The model and associated analysis methods provide a promising tool for modeling and performance evaluation of reconfigurable processors. The model is demonstrated by considering a simple examp le. This paper describes the

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... ent of a reconfigurable processor; the developed system is based on the Petri net concept. Petri nets are becoming suitable as a formal model fo r hard ware system design. Designers can use Petri net as a modeling language to perform high level analysis of complex processors designs processing chips. The simulat ion does with PIPEv 4.1 simulator. The simu lation results show that Petri net state spaces are bounded and safe and have not deadlock and the average of number tokens in first token is 0.9901 seconds. In these models, there are only 5% errors; also the analysis time in these models is 0.016 seconds.