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A Method for Hiding the Increased Non-Volatile Cache Read Latency
[article]
2021
arXiv
pre-print
The increased memory demands of workloads is putting high pressure on Last Level Caches (LLCs). Unfortunately, there is limited opportunity to increase the capacity of LLCs due to the area and power requirements of the underlying SRAM technology. Interestingly, emerging Non-Volatile Memory (NVM) technologies promise a feasible alternative to SRAM for LLCs due to their higher area density. However, NVMs have substantially higher read and write latencies, which offset their area density benefit.
arXiv:2112.10632v1
fatcat:zqf5b4gbffcofojvikl6qpwg6y