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Chip Placement with Deep Reinforcement Learning
[article]
2020
arXiv
pre-print
In this work, we present a learning-based approach to chip placement, one of the most complex and time-consuming stages of the chip design process. Unlike prior methods, our approach has the ability to learn from past experience and improve over time. In particular, as we train over a greater number of chip blocks, our method becomes better at rapidly generating optimized placements for previously unseen chip blocks. To achieve these results, we pose placement as a Reinforcement Learning (RL)
arXiv:2004.10746v1
fatcat:v5urekya2fgw3dcxbp3hskhpr4