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<a target="_blank" rel="noopener" href="https://fatcat.wiki/container/icax7kbgefdxhgco4lvborrsqe" style="color: black;">2020 IEEE 23rd International Symposium on Real-Time Distributed Computing (ISORC)</a>
The high-performance requirements needed to implement the most advanced functionalities of current and future Cyber-Physical Systems (CPSs) are challenging the development processes of CPSs. On one side, CPSs rely on model-driven engineering (MDE) to satisfy the non-functional constraints and to ensure a smooth and safe integration of new features. On the other side, the use of complex parallel and heterogeneous embedded processor architectures becomes mandatory to cope with the performance<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/isorc49007.2020.00042">doi:10.1109/isorc49007.2020.00042</a> <a target="_blank" rel="external noopener" href="https://dblp.org/rec/conf/isorc/QuinonesRSGPNRC20.html">dblp:conf/isorc/QuinonesRSGPNRC20</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/4dse2jqgmvcbjbch4pfomq4kyi">fatcat:4dse2jqgmvcbjbch4pfomq4kyi</a> </span>
more »... irements. In this regard, parallel programming models, such as OpenMP or CUDA, are a fundamental brick to fully exploit the performance capabilities of these architectures. However, parallel programming models are not compatible with current MDE approaches, creating a gap between the MDE used to develop CPSs and the parallel programming models supported by novel and future embedded platforms. The AMPERE project will bridge this gap by implementing a novel software architecture for the development of advanced CPSs. To do so, the proposed software architecture will be capable of capturing the definition of the components and communications described in the MDE framework, together with the non-functional properties, and transform it into key parallel constructs present in current parallel models, which may require extensions. These features will allow for making an efficient use of underlying parallel and heterogeneous architectures, while ensuring compliance with non-functional requirements, including those on real-time performance of the system. Index Terms-parallel programming models, parallel and heterogeneous embedded processor architectures, model-driven approaches, safety-critical embedded systems
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