III-V-on-Silicon Photonic Devices for Optical Communication and Sensing
In the paper, we review our work on heterogeneous III-V-on-silicon photonic components and circuits for applications in optical communication and sensing. We elaborate on the integration strategy and describe a broad range of devices realized on this platform covering a wavelength range from 850 nm to 3.85 μm. Introduction Silicon photonics is emerging as a powerful technology for the integration of optical functions on a chip. The main advantages of the technology are the compactness of the
... ulting circuits (due to the high refractive index contrast), the availability of high-speed opto-electronic components on the platform and the use of the well-developed silicon electronics fabrication tools for the realization of these photonic integrated circuits. However, silicon as well as germanium, the two main materials used in silicon photonic integrated circuits (PICs), have an indirect bandgap, making monolithic laser integration onto silicon photonic integrated circuits difficult. High performance semiconductor lasers (as well as other opto-electronic components) are realized in III-V semiconductors. Therefore, there is a need for the integration of III-V semiconductors on silicon photonic integrated circuits, in order to complete the toolkit for the realization of complex and advanced heterogeneous silicon photonic integrated circuits. The integration of III-V semiconductor opto-electronic components onto silicon photonic integrated circuits can be realized in various ways, ranging from flip-chip integration  over bonding approaches [2-4] to hetero-epitaxial growth  . Flip-chip integration has the advantage that the devices can be grown and fabricated on their native substrate, while it does require accurate alignment in the assembly process. Hetero-epitaxial growth allows for front-end, wafer-scale integration of the III-V materials, but it is challenging to grow high quality III-V materials on silicon, realize electrical injection and integrate such devices in a typical silicon photonics process flow. Bonding approaches, on the other hand, combine some of the advantages of flip-chip integration (i.e., epitaxial layer structures grown on their native substrate) with the scalability of hetero-epitaxial integration and is therefore considered as a very attractive approach for III-V integration onto silicon photonic integrated circuits. Several bonding techniques are being used: molecular bonding , metal bonding  and adhesive bonding  . In this paper, we elaborate on the adhesive bonding heterogeneous integration technology developed in our group, as well as the devices that have been demonstrated on this platform. Devices for both communication applications as well as sensing applications are described. III-V-on-Silicon Integration Technology Adhesive Die-to-Wafer Bonding and Wafer-to-Wafer Bonding Technology While there are various methods of transferring compound semiconductors onto a silicon-based waveguide platform (molecular bonding, adhesive bonding, anodic bonding, metallic bonding), adhesive bonding offers some significant advantages. Since the adhesive planarizes the surface, the cleanliness requirements are more relaxed, resulting in a significant reduction in bonding preparation. In addition, surface roughness requirements are relaxed. The adhesive of choice in our work is DVS-BCB (divinylsiloxane-bis-benzocyclobutene), because of its low curing temperature, high degree of planarization, high optical clarity, good thermal stability, excellent chemical stability, low moisture absorption, and wide applicability, as will be shown in the examples below. Diluting the DVS-BCB with mesitylene, thin bonding layers can be achieved (<50 nm). The largest disadvantage of DVS-BCB is probably the low thermal conductivity, especially in the context of power consuming devices such as semiconductor lasers or optical amplifiers. However, with sub 100 nm thick bonding layers, the several micron thick buried oxide of the silicon-on-insulator photonic integrated circuit (PIC) is dominant in the thermal resistance of the device.