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Quality of Service Driven Runtime Resource Allocation in Reconfigurable HPC Architectures
2016
2016 IEEE Intl Conference on Computational Science and Engineering (CSE) and IEEE Intl Conference on Embedded and Ubiquitous Computing (EUC) and 15th Intl Symposium on Distributed Computing and Applications for Business Engineering (DCABES)
Heterogeneous System Architectures (HSA) are gaining importance in the High Performance Computing (HPC) domain due to increasing computational requirements coupled with energy consumption concerns, which conventional CPU architectures fail to effectively address. Systems based on Field Programmable Gate Array (FPGA) recently emerged as an effective alternative to Graphical Processing Units (GPUs) for demanding HPC applications, although they lack the abstractions available in conventional
doi:10.1109/cse-euc-dcabes.2016.156
dblp:conf/cse/PoglianiDMB16
fatcat:zox4kxyxhfa5dlaizatez3lzhq