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A Low-Complexity, High-Performance Fetch Unit for Simultaneous Multithreading Processors
10th International Symposium on High Performance Computer Architecture (HPCA'04)
Simultaneous Multithreading (SMT) is an architectural technique that allows for the parallel execution of several threads simultaneously. Fetch performance has been identified as the most important bottleneck for SMT processors. The commonly adopted solution has been fetching from more than one thread each cycle. Recent studies have proposed a plethora of fetch policies to deal with fetch priority among threads, trying to increase fetch performance. In this paper we demonstrate that thedoi:10.1109/hpca.2004.10003 dblp:conf/hpca/FalconRV04 fatcat:ugjdcpgbwzfvtidmf7yiftx5mq