A copy of this work was available on the public web and has been preserved in the Wayback Machine. The capture dates from 2006; you can also visit the original URL.
The file type is application/pdf
.
POWER2 fixed-point, data cache, and storage control units
1994
IBM Journal of Research and Development
The POWERP" fixed-point, data cache, and storage control units provide a tightly integrated subunit for a second-generation high-performance superscalar RISC processor. These functional units provide dual fixed-point execution units and a large multiported data cache, as well as high-performance interfaces to memory, I/O, and the other execution units in the processor. These units provide the following features: dual fixed-point execution units, improved fixed-pointlfloating-point
doi:10.1147/rd.385.0503
fatcat:d5wj2h3mzbccdfpgsqabc2zvwm