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A Chip for a Routing Table Based on a Novel Modified Trie Algorithm
2000
VLSI design (Print)
Preserved Fulltext
The design for a routing table circuit for Ethernet-, IPand ATM-applications is presented. Starting point for the design was an object-oriented general behavior of the routing table. The selected data structure for the routing table is based on a modification of the structure denominated trie, saving one search level and memory space. The architecture for searching and sorting of data, implemented in hardware, is explained. This modified trie stores 64 K addresses and the associated data,
doi:10.1155/2000/81057
fatcat:zsjj37of6bgoff6ogwyacbepeu